• Important information
• New features
• Known problems
• Program corrections
• User guide corrections
• Miscellaneous
• Release history

Important information

• The compiler now avoids the LDRD instruction with the base register in list when generating code for Cortex-M3. This is to work around the Cortex-M3 erratum 602117.

• News in EWARM 6.10.2:
  

  The --guard_calls command line option is introduced. Note, --guard_calls must always be used in applications written in EC++/C++ that need thread-safe library function calls. For more information see the Development guide.

  The --no_guard_calls command line option is removed.

  The --aeabi command line option has modified behavior: Guard calls are not used by default.
  Migration instructions from IAR C/C++ Compiler for ARM 5.x and 6.10.1 to IAR C/C++ Compiler for ARM 6.10.2:
  --aeabi (without --no_guard_calls) shall be replaced with --aeabi --guard_calls
--aeabi --no_guard_calls shall be replaced with --aeabi
  

• News in EWARM 6.20:
  

  A customer that have implemented the time() function must now rename it into __time32(). For more information see the Development guide.

• A special note on CMSIS integration:
  

  If your application source code include CMSIS header files explicitly, then you should not check the Use CMSIS check-box Project>Options...>General Options>Library Configuration>Use CMSIS. Some of the Cortex-M application examples includes CMSIS source files explicitly, do not check the said check-box in these projects.
  
  However, due to the evolution of the IAR C/C++ Compiler for ARM, older versions of CMSIS are incompatible with the current version of the compiler. One simple example of how to solve this issue is:
  a) Press F4 to bring up the erroneous source (header) file in the editor - in most cases named core_cm3.h.
  b) Right-click on the window tab of that editor window, choose File Properties....
  c) Add (or remove) any character to the file name - so the compiler won't find it any more.
  d) Modify project options: Check Project>Options...>General Options>Library Configuration>Use CMSIS.
  Steps a) to c) might need to be done for more than one file. Normally, the names of these files are core_cm0.h, core_cm3.h, core_cm4.h, core_cmFunc.h and core_cmInstr.h.
  
  For more information about CMSIS integration in the IAR Embedded Workbench for ARM, see the Development guide.

• The runtime library assumes that unaligned access is allowed when it is available in the architecture
  

  For ARM core architectures where unaligned access is permitted and offers the possibility to generate more efficient code, the runtime library is built to take advantage of this. For example the library for Cortex-M3 assumes that the UNALIGN_TRP bit is not set by the embedded application.

• Not using interwork when compiling for ARM architecture v4 is deprecated
  

  For now, this mode is supported like in earlier versions of the product, but new features, like C-RUN, will not have support for this mode.

New features

• None.

Known Problems

• The C/C++ library header file time.h declares the library function mktime. When called with a negative value in the broken-down time component tm_isdst, which is part of the tm struct function parameter, mktime fails to determine whether Daylight Saving Time is active for the specified time or not.
  [EW14632]

• The rather naive algorithm for checking whether a symbol is used or not might lead to unexpected warning messages from the compiler.
  [EW23132]

• Assembler file listing containing initializers for a data object that has a type that uses __packed or #pragma pack, is incorrect.
  [EW23889]

• MISRA C:2004 rule 9.1 will not find all used uninitialized local variables.
  [EW24720]

• The overload resolution algorithm doesn't take into account template user conversion for argument deduction when finding out what built-in operator that is the best fit.
  [EW24930]

Program Corrections

• In some cases involving the name of an array in an aggregate initializer with some omitted brackets, the compiler can erroneously warn that the array appears to be unused.
  [EW23448]

• The compiler says that it checks MISRA-C:2004 rule 5.4 when it does not.
  [EW24679]

• The compiler gets the size of a parenthesised string literal initializer wrong for a variable of unknown array size when clustering is on and the literal is placed as a constant in the code.
  [EW24888]

• Loops that can be replaced by a call to memcpy, memset, or memclr can, on High, Size optimization, be incorrectly optimized if the loop test contains a post-increment/post-decrement operation.
  [EW24928]

• The MISRA-C:2004 rule 9.2 erroneously triggers for an initializer {0} for a complex type.
  [EW24938]

• The compiler no longer attempts to rename registers within inline assembler instructions.
  [EW24942]

• In EWARM 7.30.3:
  MISRA-C:2004 rule 14.2 gives a message for the assert() macro.
  [EW24992]

• In EWARM 7.30.3:
  The compiler can fail to preserve accesses to bitfields where the individual bitfield is declared volatile (as opposed to the entire struct/union being declared volatile).
  [EW25020]

• In EWARM 7.30.3:
  When designated initializers for members of an anonymous union in EC++/C++ are used in extended language mode, the compiler can erroneously emit Error[Pe2358]: a designator for an anonymous union member can only appear within braces corresponding to that anonymous union if some braces are omitted.
  [EW25025]

• In EWARM 7.30.3:
  The compiler can terminate with an internal error when a char array member is initialized with a string literal in a constructor.
  [EW25046]

• In EWARM 7.30.3:
  Array expressions where the array address is a known constant value can trigger an internal error when vectorization is enabled.
  [EW25012]

• In EWARM 7.30.3:
  Instruction scheduling for ARMv7-M results in an internal error when the last instruction in an IT block is a branching instruction, and there is no other control-flow to the branch target.
  [EW24982]

User guide corrections

• Compiler options for VFPv5 units
  The following changes apply to the syntax of the --fpu compiler option on page 251 in the IAR C/C++ Development Guide for ARM:

  Syntax

  --fpu={VFPv2|VFPv3|VFPv3_d16|VFPv4|VFPv4_sp|VFPv5_sp|VFPv5_d16|VFP9-S|none}

  Parameters
  	VFPv5_sp	For a system that implements a VFP unit conforming to the single-precision variant of the architecture VFPv5.
  	VFPv5_d16	For a system that implements a VFP unit conforming to the double-precision (D16) variant of the architecture VFPv5.

  
  The corresponding settings in the Project Options dialog box are described in the IDE Project Management and Building Guide for ARM on page 185:
  
  
  VFPv5 single-precision A VFP unit conforming to the VFPv5 architecture, single-precision.
  VFPv5 double-precision A VFP unit conforming to the VFPv5 architecture, double-precision.

Miscellaneous

• Generate workarounds for hardware problems:
  
  

  • Functional problem Core.1 in NXP device LPC2478: Incorrect update of the Abort Link register in Thumb state.
    Workaround generated with iccarm --enable_hardware_workaround=NXP_Core.1

  • Functional problem 463764 in Cortex-M3 devices: Core may freeze for SLEEPONEXIT single instruction ISR. More information is available on infocenter.arm.com.
    Workaround generated for functions with attribute __irq with iccarm --enable_hardware_workaround=arm463764

  • Functional problem in Stellaris devices: Non-word-aligned write to SRAM can cause incorrect value to be loaded. More information is available on the Stellaris web site at www.ti.com/stellaris.
    Workaround generated with iccarm --enable_hardware_workaround=LM3S_NWA_SRAM_Write

  • Functional problem in Freescale Semiconductors MC9328MX1 (i.MX1), masks 0L44N, 1L44N, and 2L44N:
    The LDM instruction will in some cases not load the second register correctly. Workaround generated with iccarm --enable_hardware_workaround=920t-ldm2
    NOTE: The libraries in the current EWARM version are not built with this workaround. Use EWARM 6.50.6 and linker option --enable_hardware_workaround=920t-ldm2 to use libraries built with this hardware workaround.

• The implementation of va_args functions have changed in IAR Embedded Workbench for ARM 7.20.1. It is no longer possible to compile the output of the pre-processor from an earlier version of the compiler. The original source code must be pre-processed again, using IAR Embedded Workbench for ARM 7.20.1.

Release history

See release history.