IAR Information Center for Arm

See New features for the IAR C-SPY Debugger.

Limitations on Cortex-A7 support

Vector catch is not implemented.
Semi-hosting must be done using the ‘IAR Breakpoint' option since vector catch is not implemented.
System registers (CP14/CP15) are not accessible.
Software break-points are not supported.
Hardware reset is not supported for the MP13x/15x boards. This is due to properties of the hardware and is not fixable.
Core reset does not work.
The banked registers R8-R14 cannot be viewed properly in the CPU Register group in the Register window. Each version of such a register has the same value as the currently selected register bank.
Single-stepping an instruction which branch to itself in the Disassembly window does not work. The CPU does not stop after the step operation, but can be stopped manually with the Stop button.