RISC-V standard extension Bit-manip (RV32B)

Assembler, simulator, and compiler support for the subgroups Zba, Zbb, Zbc, and Zbs from the RISC-V standard extension RVB

Andes V5 performance extensions

Assembler, simulator, compiler, and library support for Andes V5 performance extensions

Debug enhancements

• For devices that support system bus access, the watch windows now support live update of variables
• Handling of different reset modes has been improved

Iarbuild enhancements The iarbuild command line build utility now supports:

• Generating a Ninja build file based on the IAR Embedded Workbench project format
• Generating a JSON description of the Embedded Workbench project
• More C-STAT reporting and configuration methods

Improved Code Completion Wider scope of assisted situations, for example when adding include files More information is shown with the suggestions, for example information on function parameters and types ’Fuzzy matching’ aids in identifying suggested completions

Device support Support for the following devices has been added:

• Andes A27, A45, D45 and N45
• Fraunhofer EMSA5

64-bit Windows IAR Embedded Workbench for RISC-V is now built for 64-bit Windows