Highlights

• Support for the base instruction set RV32E
RV32E is a base instruction set that targets smaller embedded devices. The register set is reduced to half of what is available in RV32I.

• Support for the standard extension for Atomic operations (A).
The standard extension A adds instructions that support atomic read, modify, and write actions to support synchronization between different HW processes that access the same memory.

• Support for interrupt vectors
Interrupt vectors and the #pragma vector directive are now supported for a number of devices. New tutorial projects on how to work with interrupts are also included.

• Stack protection
The IAR C/C++ Compiler for RISC-V now supports stack protection. A canary value will be placed between the stack variables and the return address so that the system can detect corruption of a function return address before the function returns to that address. The compiler will use heuristic to determine whether a function needs stack protection or not. If any defined local variable has the array type or a structure type that contains a member of array type, the function will need stack protection. See the IAR C/C++ Development Guide for more information.

• Optimized floating-point libraries for devices without an FPU
New floating-point libraries hand written in assembler language to increase performance.

• Interrupt and exception catching
The debugger can now catch and act on exceptions and interrupts. These can be configured in the Project options dialog box for the C-SPY driver.

• Data breakpoints
It is now possible set a breakpoint on a data address.

• Asynchronous multicore debugging
The debugger can now handle several asynchronous cores.

• C-SPY SDK
The C-SPY SDK is now available upon request. The SDK makes it possible to develop IAR Embedded Workbench plugins and C-SPY drivers.